Vuong Ly is a Senior Staff Application Engineer at Synopsys Inc, leveraging over five years of experience in full block design, RTL design, and GDSII. They have a Master’s degree in Electrical and Electronics Engineering from Ho Chi Minh University of Technology, obtained in 2017. Previously, Vuong worked as a Staff Engineer at Synapse Design Inc. and possesses expertise in ASIC/IP verification and various physical design tools, including proficiency in EDA software and scripting languages.
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