Xin Xiao is currently a Principal Analog Engineer at Synopsys, where they lead the design of high-speed receiver analog and mixed-signal components for UCIe. Previously, they held the position of Analog Design Engineer at Intel Corporation from 2001 to 2025, taking on significant roles such as UCIe receiver analog design lead and post-silicon lead for multiple server processor generations. Xin earned a Master’s degree in Electrical and Computer Engineering from Oregon State University, graduating with a 3.95 GPA.
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