Yi-Ling Chen is a Staff Engineer at Synopsys, where they have worked since 2010, focusing on Electronic Design Automation (EDA) software for integrated circuit routing. Yi-Ling received a B.S. in Electrical Engineering from National Taiwan University (NTU) in 2008, followed by a Master's degree in Electronics Engineering from NTU, where they achieved a GPA of 4.0. Their research interests encompass computer vision, pattern recognition, machine learning, and VLSI architectures. Yi-Ling's thesis explored the design of an image content analysis system utilizing supervised machine learning techniques.
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