Yuvateja Pragada is a staff engineer specializing in ASIC physical design at Synopsys Inc, a position held since 2024. Previously, Yuvateja worked as a senior design engineer at Folik Technologies from 2018 to 2024. Yuvateja earned a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from Raghu Engineering College in 2018, following a diploma in the same field from Sanketika Polytechnic College Visakhapatnam in 2015. An enthusiastic and self-motivated engineer, Yuvateja seeks to apply skills and knowledge in demanding physical design roles.
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