Yuvraj Singh is a Staff Engineer at Synopsys Inc, specializing in SerDes IPs with a focus on TX and RX layout design. With 8 years of experience in analog layout design across advanced technology nodes, they have worked with companies such as HCL Technologies and Wipro Limited, and held the role of Layout Designer at Insilico. Yuvraj has previously contributed to the design of critical circuits, including LDOs and Bandgap References. They earned a Bachelor of Technology (B.Tech.) in Electrical and Electronics Engineering from Shri Mata Vaishno Devi University.
This person is not in the org chart
This person is not in any teams
This person is not in any offices