ZENG C.

Zeng C. is a senior manager and team lead in ASIC design, specializing in mixed-signal PHY/system at Synopsys Inc. With over a decade of experience in digital and analog mixed-signal IP development, Zeng has contributed to various high-performance product families, including DDR and LPDDR technologies. Previously, Zeng worked as an ASIC Design Engineer at AMD and held multiple positions at Synopsys Inc., where they managed cross-functional teams and drove significant efficiency improvements in silicon design processes. Zeng earned a Doctor of Philosophy in Electrical and Computer Engineering from McMaster University.