Chunkai Huang

Chunkai Huang is a seasoned ASIC design engineer with extensive experience in the semiconductor industry. Currently serving as a Sr. Staff ASIC Design Engineer at Tarana Wireless, Inc. since November 2022, Chunkai Huang focuses on the QAM combiner for HARQ. Prior positions include MTS ASIC Design Engineer at onsemi and Staff ASIC Design Engineer at Tarana Wireless, where achievements included developing IP in modem data pipelines and DMA engines. Previous roles include Design Manager at Sigma Designs, where evaluation of high-level synthesis and video IP development were key responsibilities, as well as a Sr. ASIC Design Engineer at Sigma Designs and Trident Microsystems, where local dimming designs for LED backlight LCD TVs and FPGA systems were integral projects. Chunkai Huang's career commenced with a Design Manager role at Averlogic Technologies and at Trident Technologies. Educational background includes a Master's degree in Computer Science from National Chiao Tung University.