Darshit Chhatrala is a seasoned Senior Layout Engineer currently working at Rapidise Inc since August 2024, specializing in high-speed layout, multilayer PCB design, footprint design and validation, as well as DFM and DFA creation. Prior experience includes a senior role at Teksun Inc focused on layout and schematic design, and a previous position as an Embedded Design Engineer, where responsibilities included layout, schematic design, and PCB testing and debugging. Earlier in the career, Darshit worked as an Engineer at the Space Applications Centre, ISRO, engaging in satellite testing and RF signal checks, and as a Design Engineer at GlobalTech (I) Pvt. Ltd., involved in board design and testing. The initial role as a Robotic Process Automation Engineer at Gridbots Technologies Pvt. Ltd. included foundational work on control systems, sensor interfacing, microcontroller programming, and CAD modeling. Darshit holds an educational background from Gujarat Technological University.
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