Manjunatha Gouda is a Senior Staff Engineer specializing in Analog Layout Design at Synopsys. They have extensive experience in Analog & Mixed-Signal, Memory, and Standard Cell layout design, contributing to projects for major clients such as AMD, Cadence, Qualcomm, and TSMC from their previous roles at Sankalp Semiconductor and HCL Technologies. Manjunatha has a strong focus on optimizing layout quality and performance across advanced technology nodes, including FinFET and FD-SOI. They are currently involved in high-speed SerDes layout, emphasizing robust, high-performance IP delivery. Manjunatha is pursuing a Bachelor's degree in Electronics and Communications from Kalinga University while holding a diploma from Sandur Polytechnic.
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