Daniel Hsieh, Ph.D., currently serves as an Engineering Manager at TSMC, leading the Japan 3DIC R&D Center and managing a global team to define advanced package substrate technology roadmaps. Previous experience includes a tenure at Intel Corporation where Daniel held multiple positions, including Staff Engineer, Operations Manager, and Senior Material Engineer, contributing to significant output increases and improvements in substrate technology and operations. Earlier roles included a Principal Engineer position at TSMC focused on 3DIC process development and a research appointment at Kyoto University. Daniel Hsieh holds a Ph.D. and a BS in Chemical Engineering from National Taiwan University, specializing in Material Science and Engineering.
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