Peter Hsu

Peter Hsu has extensive experience in the semiconductor industry, currently serving as a Director at TSMC since July 2006, where Peter was the first person to join and build the TSMC San Jose design center. Prior to TSMC, Peter worked at Sony as a Department Manager from January 2001 to July 2006, focusing on SRAM cache design, and at MoSys, Inc. as a Staff member from August 1998 to January 2001. Earlier career experience includes a Project Manager role at Texas Instruments, where Peter contributed to 16Mb EDO DRAM design, and a Department Manager position at ELAN Microelectronics overseeing the analog/memory design department. Peter is also recognized as an IEEE senior member. Educational credentials include participation in a PhD program at the University of Florida, focusing on Power VMOS development, and a Master's Degree in Electronics Engineering from National Chiao Tung University.