Wesker Chiang is a Principal Engineer at TSMC, specializing in standard cell layout optimization and pseudo device simulation. With an extensive background in the semiconductor industry, they have demonstrated skills in electronics, programming, and integrated circuit design. Wesker holds a Master's degree in Electrical and Electronics Engineering from National Chiao Tung University and has contributed to significant performance improvements, including reducing simulation runtimes and enhancing tool efficiency during their tenure at TSMC. Prior to their current role, they served as a Senior Engineer and Engineer, focusing on SPICE model development and advanced technology modeling.
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