Veeco
Yu-Han (Jonathan) Liang, Ph.D., is a seasoned engineer with a comprehensive background in process development and characterization within the semiconductor industry. Currently serving as a Senior Process Development Engineer at Veeco, Yu-Han previously held positions at Coherent Corp. and Intel Corporation, where expertise was applied in epitaxial characterization and process improvements for high-volume manufacturing. Early career experience includes roles as an R&D Engineer at Teratonix, LLC, and as a Research Assistant at the Center for Condensed Matter Sciences. Yu-Han earned a Ph.D. in Materials Engineering from Carnegie Mellon University and a Master's degree from National Cheng Kung University.
This person is not in any teams
This person is not in any offices