Jiabo Li

Jiabao Li has a robust background in RTL design and FPGA development, currently serving as an RTL Designer at Waymo since July 2022. Prior experience includes a tenure at Intel Corporation from August 2016 to July 2022, where roles spanned Senior RTL Module Design Engineer, FPGA System Validation & RTL Design Engineer, and Component Design Engineer, focusing on FPGA design, system-level validation, memory array, and power management IP design. Academic contributions include positions as a Graduate Teaching Assistant and Research Assistant at the University of Michigan, specializing in analog circuit design and hardware analog neural network circuits, along with prior research in metal diode design. Jiabao Li holds a Master's degree in Computer Science (Machine Learning) from Georgia Institute of Technology, a Master of Science in Electrical Engineering (IC & VLSI) from the University of Michigan, and Bachelor's degrees in Electrical and Computer Engineering and Electrical Engineering (Analog & Digital Circuit).