Hemkumar Patel

Hemkumar Patel is a skilled engineering professional with experience as a Staff Engineer at Western Digital since October 2021 and as an ASIC Verification Engineer at SeviTech Systems Pvt. Ltd. since March 2018. Hemkumar has received training in various VLSI topics, including HDL/HVL languages such as Verilog and System Verilog, as well as methodologies like UVM and VMM, and scripting in PERL. Key contributions include the verification of a switch module using both VMM and UVM, along with current involvement in SoC verification at a Western Digital client location. Hemkumar holds a Bachelor of Engineering degree in Electronic and Communication from C. K. Pithawala College of Engineering & Technology, Surat, India, completed in 2017.