Steven M.

Steven M. has a strong background in signal integrity and power integrity engineering, having worked as a Packaging Signal/Power Integrity Engineer at SanDisk® from July 2014 to July 2016, where the focus included EMI simulation and characterization of high-speed electrical interconnects, particularly within memory IO interfaces. Subsequently, Steven M. held the position of Staff SI/PI Engineer at Western Digital from September 2018 to August 2018, contributing to SI/PI simulation for high-speed memory products and advanced flash memory packaging design. Additionally, as a Senior Packaging Engineer, Steven M. played a key role in NAND-based advanced packaging design and electrical performance simulation. Steven M. holds a Master's degree in Information and Communication Engineering from the University of Electronic Science and Technology of China.