Sanjeev Patel

Sanjeev Patel is an experienced professional in the field of VLSI and hardware design, currently serving as Senior Delivery Manager at Wipro since April 2014, where management involves overseeing ASIC, SoC, FPGA, and full system projects for clients across the USA, Nordics, Japan, and India. Prior experience includes roles at Wipro Technologies from December 2009 to November 2011, where responsibilities ranged from leading a derivative SoC development engagement to managing EDA infrastructure and design methodology. Sanjeev also held positions as Technical Manager and Group Head, leading VLSI design implementation teams and managing design environments. Early career experiences include an Engineer R&D role at MCBS and a solid educational background with a Bachelor of Engineering in Electronics & Communication from Gujarat University and an MTECH in Electronics Design & Technology from the Indian Institute of Science.