Haritha Giddaluru is a highly skilled Physical Design Engineer with extensive experience in the semiconductor industry. Currently employed at Western Digital since February 2019, Giddaluru has also contributed to Adept Chip Services Pvt Ltd in various roles, including Physical Design Engineer and Physical Design Trainee Engineer since December 2016, where training on ICC tools was undertaken. Prior experience includes a position at AMD from June 2017 to February 2019, focusing on floor planning, routing, timing fixes, and DRC fixes in Hyderabad. Giddaluru holds a B.Tech degree in Electronics and Communications Engineering from S.S.I.E.T, completed in 2014.
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