Nagasai Nagarjuna Dasari

Nagasai Nagarjuna Dasari is a skilled Sr. Silicon Design Engineer at AMD since April 2025, with previous experience as a Sr. R&D Engineer at Qbit Labs Private Limited from April 2021 to March 2025. In this role, Nagasai was responsible for writing code from scratch based on protocol specifications, integrating top-level modules, and performing timing checks on bitfiles. Prior to that, Nagasai held the positions of R&D Engineer 2 and R&D Engineer 1, contributing to various projects. Nagasai completed an Advanced RTL Design and Verification course at Maven Silicon, acquiring expertise in digital electronics, Verilog HDL, System Verilog, and UVM. Additionally, a summer internship took place at Doordarshan Kendra in 2018. Nagasai is an alumnus of the National Institute of Technology Hamirpur, holding a dual degree in Electronics and Communication Engineering, earned between 2015 and 2020.