Pandian S

Sr.silicon Design Engineer at AMD

Pandian S is a Senior Design Verification Engineer at Mobiveil Inc. since September 2018, specializing in ASIC verification. Previous experience includes a temporary role as Engineer II at Qualcomm from January 2021 to March 2022, focusing on IP verification. Prior to that, Pandian S was a Trainee Verification Engineer at Ampere VLSI Academy in 2018 and worked as an Application Engineer at Gagner Automation from October 2015 to March 2018. Educational qualifications include a Master of Engineering in VLSI from Anna University, completed between 2013 and 2015.

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