Philip Colangelo

Philip Colangelo is a Machine Learning Engineer at Groq since December 2021, specializing in the efficient mapping of deep learning algorithms to Field Programmable Gate Arrays (FPGAs). Prior experience includes serving as a Machine Learning and Design Engineer at Intel Corporation, where work focused on creating optimized machine learning applications for FPGAs. Philip also contributed as a PhD Intern in deep learning research at Intel's PSG and gained experience as a Graduate Research Assistant and Teaching Assistant while earning a Doctor of Philosophy (PhD) in Computer Engineering from the University of Massachusetts Lowell. Additional experience includes a software engineering role at BAE Systems and an internship at Altera, where OpenCL was utilized for FPGA development.