Swee Hua Law is a seasoned functional safety architect currently employed at AMD since September 2024. Prior to this role, Swee Hua served as a principal engineer at Lattice Semiconductor in 2023 and held the position of SoC architect at Intel Corporation from January 2016 to 2023, focusing on FPGA security and configuration. Swee Hua's experience at Altera spanned from June 2006 to December 2015, with responsibilities including managing the embedded hardware team while leading the design of the Nios II processor and various FPGA systems. Additionally, Swee Hua worked as an IP design and verification engineer, developing soft-IP and performing functional simulations. Swee Hua holds a Bachelor of Engineering (BEng) degree in Electrical and Electronics Engineering from Universiti Malaya, obtained in 2006.
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