Venkatesh Arunachalam

Venkatesh Arunachalam possesses extensive experience in analog design engineering, currently serving as an MTS Analog Design Engineer at AMD since November 2017. Prior to this role, Venkatesh held the position of Principal Hardware Engineer at Oracle from February 2010 to November 2017, where responsibilities included designing a Serdes receiver for 28Gbps Serdes in advanced 10FF / 20nm SOC technology. Venkatesh's earlier experience includes roles as a Senior Hardware Engineer at Sun Microsystems and a Senior Design Engineer at Alliance Semiconductor, where contributions involved designing PLLs for clock generator ICs focused on low EMI applications. Venkatesh earned a Master's degree in Electrical and Computer Engineering from the University of Massachusetts Amherst and a Bachelor's degree in Electronics and Communication Engineering from Bangalore University.