Vineeth Pothula is a GPU Formal Verification Engineer at AMD since 2025, specializing in design verification with expertise in Verilog and formal verification techniques. Prior to joining AMD, they worked as an ASIC Design Verification Engineer at Abacus Semiconductor Corporation and completed an internship at Apple, where they developed Python scripts for system-on-chip design verification and automated test environments. Vineeth holds a Master of Science in Electrical and Computer Engineering from Portland State University and a Bachelor of Technology in Electrical and Electronics Engineering from JNTUH College of Engineering Hyderabad.
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