Javier Galnares

Javier Galnares has a diverse work experience. Javier started their career at AICIA, where they worked as a Fellow, specializing in compiling RT kernels and drivers, designing software applications for sensor capture, and creating adaptation stages and signal acquisition designs. Javier then worked at Oxylane Group as a logistics operator. Following that, they joined Bergé as a loader and flow controller. Javier transitioned into the field of electronics at Universidad de Sevilla, where they worked as a Fellow, focusing on real-time application development, programming modules for the Linux rt kernel, and avionics and equipment development. Javier continued their electronics work at AERTEC, AERIAM Technologies, and ALTER TECHNOLOGY TÜV NORD, holding various roles such as Systems Engineer, Senior Engineer/Consultant, PCB & HW Manager, and Head of Electrical Test Laboratory. Javier'sresponsibilities encompassed areas such as designing and developing integrated electronic systems, conducting R&D for non-electrical test benches, integrating laser sensors, and developing test fixtures for advanced measurement using Altium, LabView, and other tools. Currently, Javier works as the Head of HW Design at AERTEC, focusing on new developments based on silicon carbide (SiC) and Gallium nitride (GaN) technologies.

Javier Galnares has a master's degree in Systems Engineering and Control from Universidad Complutense de Madrid, which they completed from 2013 to 2016. Javier also has another master's degree in Systems Engineering and Control from Universidad Nacional de Educación a Distancia - U.N.E.D. from the same period. In addition, they hold a bachelor's degree in Telecommunications Engineering from Universidad de Sevilla, which they obtained from 2004 to 2012. Furthermore, Javier Galnares has a certification in Introduction to Artificial Intelligence from Udacity, obtained in November 2013.