Sowmya Ramakrishna is a seasoned professional in design verification and FPGA engineering, currently serving as Design Verification Manager at Aeva since March 2021, after transitioning from Senior Design Verification Engineer. Prior experience includes significant roles at Keysight Technologies as Principal FPGA Engineer, as well as a similar position at Ixia, where Sowmya contributed from July 2011 through March 2021. Earlier, Sowmya held positions as Verification Engineer at Veriwave Inc from March 2005 to July 2011 and as Verification Engineer at PMC-Sierra, Inc. from 1998 to 2005. Educational qualifications include a Master of Science in Computer Science from the University of Pittsburgh and a Bachelor of Engineering in Computer Science from UVCE.
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