HUSEN MULLA

Husen Mulla is an experienced engineer specializing in ASIC design and physical design verification. Currently serving as an Engineer II at Alphawave IP Group since January 2023, Husen Mulla previously contributed to OpenFive from January 2020 to January 2023, where roles included Engineer I and Engineer, focusing on PERC ESD analysis and physical verification across various chip-level designs from 7nm to 28nm nodes. Husen Mulla began the professional journey as an intern and holds a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from KLE Technological University in Hubballi, India, earned in 2020.