Saurabh Gupta

Saurabh Gupta has a diverse work experience in the field of chip design and engineering. Saurabh started their career as a HEP intern at Mentor Graphics in 2015, where they gained knowledge in Verilog, System Verilog, and the basics of UVM. In 2016, they joined Truechip as a Design Engineer and worked on the DDR4 project, where they created a test bench with multiple VIPs to facilitate data transfer. Saurabh then progressed to the role of Senior Design Engineer in 2020, working on the RISC-V project. Here, they built a test bench to support various features of the RISC-V core. In 2022, they were promoted to Lead Engineer before transitioning to their current role as Design Manager at Truechip in 2023.

Saurabh Gupta completed their Bachelor of Technology (B.Tech.) degree in electronics and communication engineering from D.C.R.U.S.T and DCRUST murthal. Saurabh attended these institutions from 2012 to 2016.