Rahul Vishal

Rahul Vishal has over 20 years of industry experience in the field of physical design, with expertise in Static Timing Analysis. Rahul is currently serving as the Director of ASIC Design at Alphawave Semi, leading a team of professionals in ASIC development. Prior to their current role, Rahul held the position of Director of ASIC Design at OpenFive. From 2013 to 2022, they worked at Intel Corporation, where they served as the SOC Design Engineering Manager and earlier as a Silicon Architect Engineer. Before that, they worked at Texas Instruments as a Lead Engineer from 2010 to 2013. Rahul's experience also includes working at NXP Semiconductors as a Technical Leader and Senior Design Engineer from 2006 to 2010, and at Bharat Electronics as a Senior Engineer from 2002 to 2006.

Rahul Vishal holds a Master of Engineering degree in Microelectronics from the Birla Institute of Technology and Science, Pilani, which they obtained from 2000 to 2001. Rahul also pursued a VLSI specialization during this time. Prior to their postgraduate studies, Rahul completed their undergraduate education at MVJ College of Engineering, where they earned a Bachelor of Engineering degree in Electronics and Communication from 1995 to 1999. Their earlier educational background includes studying at Assembly of God Church Kolkata from 1989 to 1995, although no specific degree is mentioned. Rahul has also obtained several certifications, including training in VLSI design flow, speaking up at work, signoff extraction using StarRC, managing high-conflict individuals, and improving listening skills.