Fardil Rahman

Fardil Rahman is a System Validation Engineer at ALTEN India, where employment began in January 2022, following a position as a Graduate Engineering Trainee. Prior experience includes a role at Datacom from June 2018 to August 2018, focusing on Autocad 2D and 3D. Fardil completed a Bachelor of Technology in Mechanical Engineering from J.C. Bose University of Science and Technology, YMCA, between 2017 and 2021. Prior educational accomplishments include Higher Secondary Education in Science from Gyan Vigyan Academy from 2015 to 2017 and foundational knowledge in Science, History, and Geography from Nagaon Mission High School, where studies occurred from 2011 to 2015.