Yifan Tan

Yifan Tan is an accomplished Altera Memory & I/O IP Design Engineer with a robust background in electrical and computer engineering, having graduated from the University of Toronto with a Bachelor of Applied Science. Yifan's professional experience includes roles as a Design Team Member for the University of Toronto Formula Racing, where they designed a PCB, and as a C++/MFC Software Developer Intern at Rocscience, where they developed custom software features and won an internal hackathon. Currently, Yifan is contributing to the HBM team's Test Engine IP at Altera, building on their prior experience as an FPGA Undergrad Intern at Intel Corporation.