Sachin Bansal is a Circuit Design Engineer at Analog Bits, engaged in the design of high-accuracy PVT sensors and programming termination for receivers operating at 1MHz-600MHz. Prior experience includes an RFIC Design Internship at Anokiwave, where Sachin redesigned a low-noise buffer for frequencies between 6.75GHz to 8GHz, and an Analog Design Internship at Texas Instruments focused on low-noise duty cycle correction circuits for PLL clock outputs between 200MHz to 400MHz. At NXP Semiconductors, Sachin served as Design Engineer-II, specializing in the design and validation of crystal oscillators in TSMC finfet processes, along with prior work as Design Engineer-I on analog IP modeling and verification. Sachin holds a Master of Science in Electrical Engineering (Analog & Mixed Signal) from Texas A&M University and a Bachelor of Technology in Electrical and Electronics Engineering from Delhi Technological University.
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