Anuranjan Jha is a seasoned engineering professional currently serving as a Senior Staff RFIC Design Engineer and Senior Staff GNSS RFIC Systems Engineer at Apple since February 2016, contributing to Cellular radio IC design in iPhone Air (2025) and C1 chip in iPhone 16e, focusing on delay calibration systems, RF frontend modeling, and factory test development. Previously held the position of Staff RFIC Design Engineer, contributing to multiple generations of Apple Watch and Homepod Mini wireless chips, with expertise in transmitter design, programmable baseband filters, and frequency dividers. Prior experience includes a role as Staff Design Engineer at Marvell Technology, where architecture and design of high-speed DACs were conducted, and as a Design Engineer at Silicon Labs, focusing on charge-pump PLL design and passive/mixer architectures. Anuranjan holds a PhD in Electrical Engineering from Columbia University and dual degrees (B.Tech. and M.Tech.) from the Indian Institute of Technology, Bombay.
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