Senthil Athiban

Senthil Athiban is a SoC Physical Design Engineer specializing in timing at Apple, a role they have held since 2021. Previously, Senthil worked as a SoC Design Engineer at Intel Corporation in 2020 and served as a Graduate Teaching Assistant at Arizona State University in 2021, as well as a Teaching Assistant at Vellore Institute of Technology in 2018. Senthil earned a Master of Science in Electronics and Mixed Signal Circuits from the Ira A. Fulton Schools of Engineering at Arizona State University with a GPA of 3.89 and holds a Bachelor of Technology in Electronics and Communication Engineering from Vellore Institute of Technology.