Soumya Chakraborty

Soumya Chakraborty is an experienced ASIC Design Engineer at Apple since March 2020, with a prior role as Senior Staff Design Engineer at Cypress Semiconductor Corporation from August 2015 to February 2020, where responsibilities included maintaining RTL-GDS flow for 40 nm embedded non-volatile memory and conducting RTL updates and validation. Previous experience also includes Staff Design Engineer and Staff Product Engineer positions, where tasks involved creating and validating behavioral models for Flash IP and characterizing critical parameters such as access time and data retention. Soumya's academic background includes a Ph.D. in Electrical Engineering from Rensselaer Polytechnic Institute, and a Master's degree in Communication Engineering from Birla Institute of Technology and Science, Pilani, along with a Bachelor's degree in Electronics and Communication from Birla Institute of Technology Mesra. Additional early experience includes an internship at Broadcom focused on designing test benches for audio I/O interfaces.