Gaurav Chandawale

Design Verification Engineer at Arasan Chip Systems

Gaurav Chandawale began their work experience in 2012 at Network Sound, where they served as an FPGA Design Intern from January to June. Following this, they worked as an FPGA Design Intern at Fastor Systems from July to October. In November 2012, Gaurav joined Arasan Chip Systems Inc. as a Design Verification Engineer.

Gaurav Chandawale completed their education in a chronological order. Gaurav began their educational journey at Sardar Dastur Hoshang Boy's High School from 1995 to 2001. Gaurav then pursued their Bachelor's degree in Electrical Engineering from Pune University, completing it from 2003 to 2008. Following this, they attended San Jose State University, where they obtained their Master of Science (MS) degree in Electrical and Electronics Engineering from 2009 to 2011.

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Timeline

  • Design Verification Engineer

    November, 2012 - present