Sidhartha Taneja

Sidhartha Taneja is a Principal CPU Design Engineer at Arm, bringing over 20 years of experience in CPU design, custom programmable accelerator design, and SoC design. They currently work on the RTL Design Team for ARM's Little A Class CPU L1 Memory System, having previously contributed as an Architect and Lead RTL Designer for a multithreaded DSP accelerator used in radar applications for Advanced Driver Assistance Systems (ADAS). Sidhartha has a deep understanding of the entire design flow from system-level requirements to GDSII and has successfully managed various verification and design roles across notable companies including NXP Semiconductors, Freescale Semiconductor, and Texas Instruments. They earned a B Tech degree in Electrical Engineering from the Indian Institute of Technology, Roorkee.