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Cyrille Ludwig

Senior DV Engineer at Arteris

Cyrille LUDWIG has extensive work experience in the field of semiconductor design and verification. Cyrille is currently employed as a Senior DV engineer at Arteris IP since January 2021. Prior to this, they worked at Nokia as a Specialist SOC from April 2017 to January 2021. Before joining Nokia, they worked at Sierra Wireless as an IC Digital Designer from January 2001 to January 2017.

Cyrille LUDWIG's education history begins with an Engineer's Degree in Software, Electronic, and Microelectronic from EFREI Paris, which was completed between an unspecified start year and 2001. Later, between 2003 and 2009, Cyrille attended the Conservatoire National des Arts et Métiers, focusing on Finance, General.

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Timeline

  • Senior DV Engineer

    January, 2021 - present