Arteris
Toumi Ibrahim has a work experience spanning over 13 years in the fields of supply chain management (SCM) and project management (PMP®).
Beginning in 2008, Toumi worked as a Software Developer at SAGEMCOM until 2010. Following this, from 2010 to 2011, they held similar positions at Amundis and Sophia Conseil.
In 2011, Toumi joined Cisco Video Technologies France as a Senior Software Engineer. Over the course of their tenure, they advanced to the role of Software Integration Team Leader, where they managed teams in France and India, scheduled team activities, tracked bugs and features, and built software releases for customers.
From 2017 to 2021, Toumi served as the Projects and Resources Planning Manager, Planning Processs at Magillem. In this role, they were responsible for planning and scheduling project releases, reporting progress status, and improving production processes.
Currently, Toumi is employed at Arteris IP, where they have held multiple positions since 2020. They began as the Chief Projects Scheduling, responsible for project scheduling. They then moved on to become the Director Process before assuming their current role as the Project Director.
Throughout their career, Toumi has demonstrated expertise in project management, resource planning, software integration, and software development. They are proficient in tools such as Jira software and have experience in process improvement.
Toumi Ibrahim attended ENIT from 2004 to 2007, where they obtained a degree in Télécommunication. Prior to that, from 2002 to 2004, Toumi attended EPEIM and completed a Préparatoire program in Math Physique. In terms of additional certifications, Toumi obtained their PMP certification from the Project Management Institute in February 2022 and their SCM certification from Scrum.org in March 2016.
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Arteris
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Arteris is helping power the next wave of autonomous driving, 5G and Artificial Intelligence (AI) systems fueling the growth the of the semiconductor industry. Our Network-on-Chip (NoC) interconnect semiconductor intellectual property (IP) is the on-chip communications backbone of most of the world’s most important and sophisticated systems-on-chip(SoC). Optimizing on-chip dataflow and connectivity is the cornerstone of our vision for system-on-chip development and assembly. Since our inception in 2003, we have pioneered the development and commercialization of NoC interconnect technology, cementing our position as the world’s first and largest commercial NoC interconnect IP company. Our unique technology meets the needs for cache coherent and non-coherent on-chip communications, on-chip data caching, and on-chip data protection to meet functional safety requirements.ARTERIS IP PRODUCTS AND SOLUTIONSOur on-chip NoC-based interconnect IP products make systems-on-chip easier to develop, perform better, and faster to get to market.The Arteris IP product portfolio meets the needs of design teams creating nearly any type of digital logic SoC with any type of communications semantics. Our seminal FlexNoC® Interconnect IP pioneered the market for NoC interconnects and is the industry leader. The highly configurable Ncore® Cache Coherent Interconnect IP allows optimal integration of cache-coherent Arm®-based processor IP with other cache-coherent and non-coherent IP.The growth of Artificial Intelligence (AI) and Machine Learning (ML) has inspired the creation of two innovative products. The Arteris IP AI Package is an option to Arteris FlexNoC that provides automated means to create complex topologies (meshes, rings, and tori) while adding multicast/broadcast communications, virtual channels, and source-synchronous communications to meet the unique needs of AI/ML chips. The CodaCache® Last Level Cache provides a highly configurable cache that can be instantiated anywhere within an SoC interconnect, providing data locality wherever needed.To meet the needs of the new generation of multibillion-transistor chips for automated systems with functional safety requirements, Arteris IP also offers Resilience Packages that provide hardware-based data protection technologies as well as automated diagnostic coverage analysis to help meet requirements ISO 26262 and IEC 61508 functional standards. Resilience Packages are available for FlexNoC, Ncore and CodaCache IP products.Timing closure has become a key design schedule constraint as chips have grown in size and complexity and semiconductor manufacturing process critical dimension have shrunk. To address this, Arteris IP created the PIANO® Timing Closure Package which provides physical and timing information about the interconnect to back-end synthesis place and route tools to help ensure faster timing closure.