Yaron Semiat

Yaron SEMIAT has extensive work experience in various roles and companies. Yaron joined Arteris in 2020 as the Director of Engineering HW / SW Interface and also worked as a Product Owner. Prior to that, they worked at SILKAN GROUP from 2014 to 2020, serving as the Chief FPGA Architect. Before that, they were a Senior ASIC and FPGA Design Engineer at INSIDE Secure from 2011 to 2014. Yaron gained experience as the PCIe and USB3.0 Team Leader, ASIC Project Leader, and Verification Team Leader at PLDA from 2004 to 2011. Yaron started their career as an IC Design Engineer at Rafael from 1996 to 2003.

Yaron SEMIAT obtained a Bachelor of Science degree in Computer systems, DSP, and Communications from Technion - Israel Institute of Technology. This degree was earned between 1994 and 1998. Later, from 2001 to 2003, Yaron pursued a Master of Science degree in VLSI from the same institute. Additionally, Yaron holds a certification in MSC Electronic Engineering from Technion - Israel Institute of Technology, although the specific month and year of obtaining this certification are not provided.