Eyal Brandstein

Eyal Brandstein has extensive experience in the tech industry, with a focus on engineering and integration roles. Eyal is currently working as a Sr. Principal Product Application Engineer at Astera Labs since April 2022. Prior to this, they worked at AMD as a Post-Si PCIe Sub System Technical Lead from January 2020 to April 2022. Eyal also held a position at Qualcomm from January 2017 to November 2021, where they were responsible for system architecture and integration activities for WiGig chipsets. Before that, they worked at Intel Corporation in various roles, including ASIC Technical Leader and Product Enablement System Engineer, from January 2011 to July 2016. Eyal also worked at Lucidlogix Technologies Ltd. as an ASIC Technical Leader and PCI Express Expert from March 2007 to January 2011, and at IBM as a Logic Design Team Leader from April 2002 to February 2007. Overall, Eyal has a strong background in hardware and software integration, specifically in areas such as PCIe, Ethernet networking, and system architecture.

Eyal Brandstein completed their Bachelor of Science degree in Electrical Engineering from Technion - Israel Institute of Technology, between 1997 and 2001. Eyal later pursued an MBA degree from the same institution, graduating between 2003 and 2005. The field of study for their MBA is not specified.