Sino Sino is an accomplished firmware engineer with extensive experience in developing and enhancing firmware for various PCIe switch projects. Currently serving as a Senior Principal Firmware Engineer at Astera Labs since September 2023, Sino has previously held prominent roles such as Technical Director of Firmware Engineering at Rambus and Senior Technical Staff Engineer at Microchip Technology Inc. Sino's expertise spans multiple generations of PCIe technology, including significant contributions to secure boot firmware and system features for PCIe Gen3, Gen4, and Gen5 switches, as well as collaborative efforts on CXL standards. With a strong background in firmware design dating back to early roles at Microsemi Corporation and Chipnuts Technology Inc., Sino demonstrates a consistent ability to develop critical firmware solutions and lead engineering teams effectively. Sino holds a Master’s degree in Optical Engineering from Zhejiang University and a Bachelor’s degree in Optical Information Science & Technology from Huazhong University of Science and Technology.
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