Vallinath Panchagnula

Vallinath Panchagnula is an accomplished engineering leader with extensive experience in the technology sector. Currently serving as the Director of Engineering for AI/ML Interconnect Solutions at Broadcom Inc., a position held since August 2014, Vallinath previously worked at Cisco Systems from August 2000 to August 2014, where responsibilities included leading engineering teams in the Secure Access and Mobility Product Group. Prior to that, Vallinath held engineering roles at UNH InterOperability Lab from 1998 to 2000. Vallinath holds a Master of Science in Electrical Engineering from the University of New Hampshire and a Bachelor of Technology in Electronics and Communications Engineering from Jawaharlal Nehru Technological University.