Danny Attias

Danny Attias is a seasoned engineer with extensive experience in the semiconductor industry, currently serving as a Sr. Principal Design IP's Application Engineer at Cadence Design Systems since October 2019, where responsibilities include leading pre-sales activities for various Design IPs in Israel. Previously, Danny held multiple positions at Intel Corporation, including SOC Front-End Integration Lead for the 12th generation CPU and SOC Integration Design Engineer, focusing on the integration of IPs for next-generation CPUs. Earlier roles at Marvell Israel Ltd. included Verification Team Manager and Lead, overseeing verification processes for cellular chip designs. Danny's career commenced at Gilat Satellite Networks as a Board Designer and ASIC Design Engineer. Danny holds a BSc in Electric Engineering from the Holon Institute of Technology.