Kanmani A

Senior Solutions Engineer at Cadence Design Systems

Kanmani A is an engineer with extensive experience in the field of verification and development, currently working as Engineer I at Qualcomm since 2021 and as Engineer Verification at Mobiveil Inc. since November 2019. At Mobiveil, Kanmani A specializes in NVMe in SoC projects, focusing on the development and debugging of C and SystemVerilog test cases. Previously, as an ASIC Verification Trainee at Ampere VLSI Academy from June to October 2019, Kanmani A gained experience in developing SystemVerilog and UVM-based verification environments from scratch and worked with AMBA protocols such as APB, AHB, and AXI. Kanmani A holds a Bachelor of Engineering degree in Electronics and Communications Engineering Technology from PSNA College of Engineering and Technology, completed in 2019.

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