Louis-Pierre Lafrance

Louis-Pierre Lafrance has extensive experience in the field of electrical engineering, particularly in semiconductor design, with a career at Cadence Design Systems starting in March 2013, where roles have included Design Engineering Director, Design Engineering Architect, Senior Principal Engineering Designer, and Principal Engineering Designer within the SoC Realization Group. Prior to Cadence, Louis-Pierre worked as a Staff Product Engineering Designer at PMC-Sierra from February 2010 to February 2013 and as an FPGA/ASIC Designer at MDA Space Missions from November 2008 to February 2010. Starting in March 2006, Louis-Pierre gained experience as an FPGA Designer at Hardent until November 2008. Academic credentials include a Master of Applied Science in Electrical Engineering from Polytechnique Montréal and a Bachelor of Applied Science in Microelectronics from UQAM. Although a Ph.D. in Electrical Engineering was pursued at Polytechnique Montréal, it remains incomplete.