Shuo Liu is an experienced ASIC Design Engineer currently employed at Cavium Networks since December 2012. Prior to this role, Shuo served as an ASIC Front End Design Engineer at Advanced Micro Devices from August 2009 to December 2012, where feature improvements for the USB 2.0 PHY of the AMD southbridge chip were implemented. Earlier career experience includes working as an ASIC Back End Design Engineer at Symmid Semiconductor Technology from June 2007 to June 2009, focusing on block level physical design using IBM Foundry 65 nm technology. Shuo Liu holds a Master's degree in Electrical Engineering from Stanford University and a Bachelor of Science in Electrical Engineering and Computer Science from the University of California, Berkeley.