Ranjith Kumar Poojary

IP Design Verification Lead at Cerium Systems

Ranjith Kumar Poojary has a strong background in design verification engineering. Ranjith began their career in 2016 as an ASIC Design Verification Intern at Maven Silicon. In 2017, they moved on to Cerium Systems, where they held multiple roles. Ranjith started as a Soc Verification Engineer and later transitioned to Senior Design Verification Engineer. Currently, they are serving as an IP Design Verification Lead at Cerium Systems.

Ranjith Kumar Poojary completed a VLSI/RN ASIC Design and Verification course at Maven Silicon from 2016 to 2017. Prior to that, they pursued a Bachelor of Engineering (BE) in Electronics and Communications at K N S Institute of Technology in Bangalore from 2012 to 2016. Additionally, Ranjith attended Nagarjuna PU for their K N S IT degree, though the specific field of study is not provided, and the end year is unknown.

Links

Timeline

  • IP Design Verification Lead

    February, 2023 - present

  • Senior Design Verification Engineer

    February, 2020

  • Soc Verification Engineer

    March, 2017

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