Abhishek Bhat

Abhishek Bhat is an Analog and Mixed Signal IC Designer with expertise in high-speed SerDes and low-power RF/mmwave ICs. Currently serving as a Senior ASIC Engineer at Cisco, they design high-performance high-speed serial links for silicon-photonic products. Previously, Abhishek worked as a Product Engineer at Cypress Semiconductors, focusing on NVSRAM and SRAM characterization, and served as a Project Associate at the Indian Institute of Technology, Madras, contributing to RF and mm-wave integrated circuit research while earning their Ph.D. in Analog and Mixed Signal VLSI. Abhishek holds a Bachelor's degree in Electrical, Electronics, and Communications Engineering from R. V. College of Engineering, Bangalore.