Jed Bian

Jed Bian has a diverse work experience in the engineering field. Jed started their career at Aviat Networks in 2010 as a Student Signal Processing Engineer, where they contributed to the development of an Ethernet packet generator/monitor module and automated product testing system. In 2011, they became a Signal Processing Engineer at Aviat Networks, focusing on the design and implementation of the FPGA in CTR8540, a layer-3 microwave router. Jed was responsible for the development of a proprietary serial backplane communication interface.

In 2014, Jed joined Navico as an FPGA Engineer and worked on various FPGA projects until 2016. After that, they joined IMC Trading as a Hardware Engineer, where they worked until 2019. During their time at IMC Trading, they gained expertise in hardware engineering and made significant contributions to the company.

From 2019 to 2020, Jed took a break from their professional career and was on Garden Leave. Most recently, in 2020, they joined Citadel Securities as an FPGA Engineer.

Jed Bian pursued their education at The University of Auckland from 2009 to 2012, where they obtained a Bachelor of Engineering (Hons) degree with a specialization in Computer Systems.